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AkkuratCore – Fertigung

Licensable hardware security architecture for semiconductors: physical domain separation via DTI, E-Fuse and non-galvanic coupling.

AkkuratCore Logo

AkkuratCore

Dresden (Germany)New on Amplifa

Dresden, GermanySilicon Saxony location
Semiconductor Security IPBusiness model
DTI, E-Fuse, BCPCore mechanisms
Utility model active, EuropeanIntellectual property rights

About AkkuratCore

AkkuratCore is a semiconductor IP company based in Dresden (Silicon Saxony). The company develops and licenses the AkkuratCore™ security architecture for chips in regulated environments: the application and security domains are physically separated — through Dielectric Trench Isolation (DTI) with a closed perimeter, irreversible E-Fuse fixing of the security rules during wafer test, and non-galvanic, capacitive or inductive coupling across Boundary Crossing Points. The ratio of isolation to active area (T_ratio) remains constant across all process nodes, which means the security proof is valid in a node-agnostic manner. The architecture is implemented as a System-in-Package with Island A and Island B as separate chiplets on a Security Interposer. Offerings include IP licensing, chiplet integration, design partnerships, RTL audit, tape-out support and silicon test vehicles. Application fields are critical infrastructure (KRITIS), smart meter gateways, automotive ECUs, MedTech, aerospace, robot safety and AI agent systems.

Site
Dresden, Germany
Processes
Semiconductor Security IP (AkkuratCore™: DTI, E-Fuse, BCP), Architecture licensing (IP block for SoC/SiP designs), Chiplet integration (Island B as security chiplet on Security Interposer), Design partnership / co-development, RTL audit, tape-out support, silicon test vehicle
Materials
Dielectric Trench Isolation, E-Fuse Axiom Fortress, Boundary Crossing Points, System-in-Package / Security Interposer, T_ratio scale invariance, RTL implementation
Certificates
Utility model active, European patent application in finalization, DPMA trademark registered
Industries
Semiconductors / Semiconductor IP, Critical infrastructure (energy, water, healthcare), Smart Meter Gateways & Power Grid, Automotive ECU, Industrial Automation, Health / MedTech
  1. 01

    Architecture specification

  2. 02

    RTL implementation

  3. 03

    RTL audit

  4. 04

    Tape-out support

  5. 05

    Wafer test (E-Fuse fixing)

  6. 06

    Silicon test vehicle

  7. 07

    Customer validation

  8. 08

    IP licensing / chiplet integration

Architecture Principles and Methods

DTI

Dielectric Trench Isolation

Separates the application domain from the security domain through a closed dielectric perimeter.

E-Fuse

E-Fuse Axiom Fortress

Security rules are burned in during wafer test and can be altered neither by software nor by firmware.

BCP

Boundary Crossing Points

All data paths between the islands run exclusively via capacitive or inductive coupling — with no galvanic attack path.

SiP

System-in-Package / Security Interposer

Island A and Island B integrated as separate chiplets on a Security Interposer.

T_ratio

T_ratio scale invariance

The ratio of isolation to active area remains constant across all process nodes.

RTL

RTL implementation

The specified core architecture is transferred into a Register-Transfer-Level design.

Location

Standort Dresden

Dresden

DE

Physical design site / development

Materials
Semiconductor IP, RTL, SiP chiplet architecture

IP Modules and Security Components

Island B — security chiplet on Security Interposer
Island B — security chiplet on Security InterposerChiplet integration · critical infrastructure / regulated domains
AkkuratCore™ security architecture
AkkuratCore™ security architectureSemiconductor Security IP · SoC / SiP

Inside the production

AKKURAT inside — Secured Domain, AI Agent Domain, application fields
AKKURAT inside — Secured Domain, AI Agent Domain, application fields
AkkuratCore™ seal
AkkuratCore™ seal

Industries

Semiconductors / Semiconductor IPCritical infrastructure (energy, water, healthcare)Smart Meter Gateways & Power GridAutomotive ECUIndustrial AutomationHealth / MedTechAerospace & DefenseFinTech & POSRobot SafetyTelecom & NetworkingSmart CitiesAI accelerators & agent systems

Additional services

Semiconductor Security IP (AkkuratCore™: DTI, E-Fuse, BCP)Architecture licensing (IP block for SoC/SiP designs)Chiplet integration (Island B as security chiplet on Security Interposer)Design partnership / co-developmentRTL audit, tape-out support, silicon test vehicle

Security Proof

The architecture enforces security invariants outside software control: limits are physically sealed during wafer test, and according to the company a design audit is valid across all process nodes.

EvidenceDresden
Utility model active
European patent application in finalization
DPMA trademark registered

History

  1. 2010

    Stuxnet on the website as a reference for the physical consequences of software-based attacks (context reference).

  2. Core architecture fully specified, T_ratio scale invariance formalized, RTL implementation in progress, utility model active, European patent application in finalization, trademark registered with the DPMA.

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