Semiconductor Engineering Consulting for Design Verification, FPGA Development and AI-Assisted Verification Workflows
Alpinum Consulting
Bristol (UK) · Mexico · Costa Rica · Egypt · India (in preparation)New on Amplifa
About Alpinum Consulting
Alpinum Consulting is a globally active semiconductor engineering consulting firm headquartered in Bristol (UK). The company supports semiconductor manufacturers, EDA vendors, startups and large enterprises in the development and verification of complex hardware and embedded systems. Its service portfolio includes Design Verification for ASIC, SoC and FPGA, pre-silicon design from specification to GDSII, post-silicon bring-up and production testing (via partners such as SilTest), embedded software testing, analog and mixed-signal design, and simulation through to tapeout. A key focus is the controlled introduction of AI in Design Verification (AI in DV), including the proprietary AI-assisted verification tool AlpinumDV and an SVA-to-requirements mapping tool. In addition, Alpinum offers training (UVM, SystemVerilog, RISC-V, Formal, AMS), staff augmentation with development centers in Mexico, Costa Rica, Vietnam, India and Eastern Europe, as well as strategic consulting and technical due diligence. Work is carried out with common EDA tools such as Synopsys VCS, Cadence Xcelium and Siemens QuestaSim. Target industries include telecommunications, aerospace/defence, automotive, medical technology, industrial automation, IoT, consumer electronics and AI acceleration.
- Site
- BS7 9HH Bristol
- Processes
- Design Verification (ASIC, SoC, FPGA, embedded), FPGA Consulting & Verification, AI in DV (AI-assisted Design Verification, AlpinumDV), Embedded Software Testing, Formal Verification (Property Checking, Equivalence Checking, Assertion-Based Verification), Analog & Mixed-Signal (AMS) Design, Modelling, Simulation, Verification and Tapeout Support, VLSI / Pre-Silicon Design (RTL to GDSII), Post-Silicon Bring-up, Debug and Production (Manufacturing Test, OSAT, via partners such as SilTest)
- Materials
- 65nm CMOS, Silicon (ASIC/SoC Development), Silicon (ASIC/SoC), Synopsys VCS, Cadence Xcelium, Siemens QuestaSim, Cadence Virtuoso, Synopsys Custom Compiler
- Founded
- 2016
- 01
Consulting and technical analysis
- 02
Design and verification planning (pre-silicon, RTL to GDSII)
- 03
Simulation, regression and coverage closure with EDA tools
- 04
AI-assisted verification (AlpinumDV, SVA-to-Req)
- 05
Post-silicon bring-up, debug and production testing (with partners)
- 06
Training and capability building at the customer
Tools, EDA Stack and Technologies
65nm CMOS
Project experience from a SAR-ADC design in the analog/mixed-signal domain.
Silicon (ASIC/SoC)
Target technology of the design and verification services for ASIC and SoC development.
Synopsys VCS
EDA simulation software for Unified Execution Framework and AI-in-DV workflows.
Cadence Xcelium
EDA simulation software, integrated via unified simulation and coverage automation.
Siemens QuestaSim
EDA simulation software in Alpinum's expertise stack.
Cadence Virtuoso
Full-custom analog/AMS/RF layout tool for floorplanning and manual routing.
Synopsys Custom Compiler
Tool for full-custom analog design.
Xschem, LTspice, ADS, Sonnet, CST
Analog and RF simulation tools for schematic capture, parasitic and EM verification.
MATLAB, Octave, Python
Scripting and automation tools for curve extraction, LUT processing and circuit sizing.
MooresLab AI, Anthropic API (Claude Code), LangChain
LLM and AI tooling for spec-to-UVM generation, RAG pipelines and secure local deployment.
FPGA Platforms AMD/Xilinx, Intel, Lattice, Microchip
Vendor-neutral FPGA consulting across leading technology platforms.
Locations
Bristol (Head Office)
GBHeadquarters
- Materials
- Semiconductor engineering services
- Synopsys VCS
- Cadence Xcelium
- Siemens QuestaSim
- Cadence Virtuoso
- Synopsys Custom Compiler
Bristol (Registered Office)
GBRegistered Office (Engine Shed, Station Approach, Temple Meads)
Mexico
MXOffice / Delivery Center (Nearshore)
Costa Rica
CROffice / Delivery Center (Nearshore)
Egypt
EGOffice
India
INOffice (in preparation)
Inside the production
Processes & technical limits
| Processes | Tolerance | Max. part | Weight | Lot size | Materials |
|---|---|---|---|---|---|
| Design Verification (ASIC, SoC, FPGA, embedded)Engineering | – | – | – | – | – |
| FPGA Consulting & VerificationEngineering | – | – | – | – | FPGA technology platforms AMD/Xilinx, Intel, Lattice |
| AI in DV (AI-assisted Design Verification, AlpinumDV)Engineering | – | – | – | – | – |
| Embedded Software TestingTesting | – | – | – | – | – |
| Formal Verification (Property Checking, Equivalence Checking, Assertion-Based Verification)Engineering | – | – | – | – | – |
| Analog & Mixed-Signal (AMS) Design, Modelling, Simulation, Verification and Tapeout SupportEngineering | – | – | – | – | 65nm CMOS (SAR ADC project experience) |
| VLSI / Pre-Silicon Design (RTL to GDSII)Engineering | – | – | – | – | – |
| Post-Silicon Bring-up, Debug and Production (Manufacturing Test, OSAT, via partners such as SilTest)Testing | – | – | – | – | – |
| Staff Augmentation / VLSI Engineering Teams (T&M, ODC/NDC)Engineering | – | – | – | – | – |
| Semiconductor Training (UVM, SystemVerilog, SVA, Formal, RISC-V, VHDL/OSVVM, AMS, AI in DV)Engineering | – | – | – | – | – |
| Security Services (Secure Boot, Root of Trust, Firmware Signing, HW-to-Cloud)Engineering | – | – | – | – | – |
| DevOps & SDLC Services (CI/CD, Cloud Management, Multi-Cloud)Engineering | – | – | – | – | – |
| Agile Transformation & Delivery Excellence (SAFe)Engineering | – | – | – | – | – |
| Consulting, Startup/Investment Advisory, Technical Due DiligenceEngineering | – | – | – | – | – |
| Analog Tapeout Support (DRC/LVS Debugging, Sign-Off)Engineering | – | – | – | – | – |
| HW/SW Integration Verification (HSI, Co-Simulation)Testing | – | – | – | – | – |
8 Anlagen & Maschinen
| Machine | Manufacturer / model | Quantity | Working area | Year built | Site |
|---|---|---|---|---|---|
| EDA Simulation Software (VCS) | Synopsys | – | – | – | – |
| EDA Simulation Software (Xcelium) | Cadence | – | – | – | – |
| EDA Simulation Software (QuestaSim) | Siemens | – | – | – | – |
| Full-Custom Analog/AMS/RF Layout Tool (Virtuoso) | Cadence | – | – | – | – |
| Custom Compiler (Full-Custom Analog Design) | Synopsys | – | – | – | – |
| Analog/RF Simulation Tools (Xschem, LTspice, ADS, Sonnet, CST) | – | – | – | – | – |
| Scripting Automation (MATLAB, Octave, Python) | – | – | – | – | – |
| LLM/AI Tooling (MooresLab AI, Anthropic API/Claude Code, Local LLMs, LangChain) | – | – | – | – | – |
Additional services
Reference customers
Company History
- 2016
Alpinum Consulting founded by Dr. Mike Bartley in Bristol, UK.
- 2020
The founder's previous company (Test and Verification Solutions, 450+ engineers) was acquired by Tessolve Semiconductors; Mike Bartley worked there as SVP.
- 2025
Relaunch of Alpinum in April to deliver industry solutions; build-out of a global office network (Mexico, Costa Rica, Egypt, India).