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TRISTAN – Fertigung

EU research consortium for industrializing the European RISC-V ecosystem building blocks, EDA tools and software

TRISTAN Logo

TRISTAN Project

Europe-wide consortium (46 partners)New on Amplifa

46 partnersConsortium
2023Project launch / website published
KDT research projectLegal form
SemiconductorsIndustry

About TRISTAN

TRISTAN is a research consortium of 46 partners under the EU KDT programme with the goal of expanding, maturing and industrializing the European RISC-V ecosystem. The consortium creates a repository of industrial-quality building blocks (IP) for SoC designs in application areas such as automotive and industry. The approach is holistic and covers electronic design automation (EDA tools), test and verification suites with 100 % coverage, complete documentation, software libraries and tooling. In addition, the European Unified RISC-V IP Access Platform (UAP) was introduced, a collection of EU-developed RISC-V components. Leveraging the open-source community is intended to increase productivity and quality and to create a European, sovereign alternative to commercial and proprietary providers. Permissive licensing terms are intended to facilitate the industrial use of the building blocks.

Site
Europe-wide consortium (46 partners)
Processes
RISC-V building blocks/repository for SoC designs, Open-source EDA tools, Test and verification suites (100 % coverage), Documentation, Software libraries and tooling, Unified RISC-V IP Access Platform (UAP), Permissive licensing
Materials
RISC-V building blocks (IP), Open-source EDA tools, Verification suites, Software stack, Unified RISC-V IP Access Platform
Certificates
Verification suites with 100 % coverage, ISO 9001
Employees
46 partners (consort
Industries
Semiconductors, Automotive, Industry/Electronics
  1. 01

    IP building blocks for RISC-V SoC designs

  2. 02

    Open-source EDA tools

  3. 03

    Test and verification suites

  4. 04

    Documentation

  5. 05

    Software libraries and tooling

  6. 06

    Unified RISC-V IP Access Platform (UAP)

Technologies & Processes

IP

RISC-V building blocks (IP)

Repository of industrial-quality building blocks for SoC designs in automotive and industry.

EDA

Open-source EDA tools

Fast and efficient tools for electronic design automation in the RISC-V environment.

VER

Verification suites

Test plans and verification suites for 100 % coverage of the building blocks.

SW

Software stack

Software libraries and tooling to support the RISC-V building blocks.

UAP

Unified RISC-V IP Access Platform

Platform for access to EU-developed RISC-V components.

Locations & Partners

Europe-wide consortium

EU

Research consortium with 46 partners

Materials
RISC-V IP, EDA tools, software

Components & Outputs

Hardware synthesis of CoreDSL custom instructions for MCUs and applications
Hardware synthesis of CoreDSL custom instructions for MCUs and applicationsRISC-V IP · Semiconductors
Superscalar CVA6 implementation with performance model
Superscalar CVA6 implementation with performance modelRISC-V processor · Semiconductors

Inside the production

Hardware synthesis of CoreDSL custom instructions
Hardware synthesis of CoreDSL custom instructions
Longnail: Custom instructions for MCUs and applications
Longnail: Custom instructions for MCUs and applications
Funded by the EU
Funded by the EU
Chips Joint Undertaking
Chips Joint Undertaking

Industries

SemiconductorsAutomotiveIndustry/Electronics

Additional services

RISC-V building blocks/repository for SoC designsOpen-source EDA toolsTest and verification suites (100 % coverage)DocumentationSoftware libraries and toolingUnified RISC-V IP Access Platform (UAP)Permissive licensing

Quality & Verification

TRISTAN relies on thorough and consistent test plans and verification suites for 100 % coverage as well as complete and precise documentation of the building blocks.

EvidenceEurope-wide consortium
Verification suites with 100 % coverage
ISO 9001

Project History

  1. 2023

    Launch of the project website (14 August 2023)

  2. 2026

    Presentation of the European Unified RISC-V IP Access Platform (UAP) in HiPEACINFO #77 (January 2026)

  3. 2026

    UAP presentation at FOSDEM 2026 (May 2026)

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